path: root/potentiosynth/front-panel-pcb/kicad/models/100SP1T2B4M6QE.step

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/****************************************************************
 * Generated by software with PDElib inside                    *
 * PDElib Version v51a, created Fri 09/10/2010                  *
 * ITI Transcendata (http://www.transcendata.com/)              *
 ****************************************************************/
FILE_DESCRIPTION((' '),'2;1');
FILE_NAME('P:\\E-Switch Secure\\3D_MODELS_STP_FORMAT\\100SPxT2B4M6xE.stp','2017-07-28T09:31:37',(' '),(' '),' ','ACIS',' ');
FILE_SCHEMA(('CONFIG_CONTROL_DESIGN'));
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