From d63df10f7268399b364c22ecd6046c14c418f806 Mon Sep 17 00:00:00 2001
From: Philip Lampkin <plampkin@chem.wisc.edu>
Date: Tue, 29 Dec 2020 14:57:13 -0600
Subject: Initial commit

---
 .../LIB_LDD-1500L/LDD-1500L/EasyEDA/LDD-1500L.lbr  | 152 +++++++++++++++++++++
 1 file changed, 152 insertions(+)
 create mode 100644 Digital Photoreactor Controller Schematics/LIB_LDD-1500L/LDD-1500L/EasyEDA/LDD-1500L.lbr

(limited to 'Digital Photoreactor Controller Schematics/LIB_LDD-1500L/LDD-1500L/EasyEDA/LDD-1500L.lbr')

diff --git a/Digital Photoreactor Controller Schematics/LIB_LDD-1500L/LDD-1500L/EasyEDA/LDD-1500L.lbr b/Digital Photoreactor Controller Schematics/LIB_LDD-1500L/LDD-1500L/EasyEDA/LDD-1500L.lbr
new file mode 100644
index 0000000..f13224e
--- /dev/null
+++ b/Digital Photoreactor Controller Schematics/LIB_LDD-1500L/LDD-1500L/EasyEDA/LDD-1500L.lbr	
@@ -0,0 +1,152 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!--/1216549/363401/2.47/9/4/Connector/-->
+<!DOCTYPE curve SYSTEM "eagle.dtd">
+<eagle version="7.7.0">
+<drawing>
+<settings>
+<setting alwaysvectorfont="no"/>
+<setting verticaltext="up"/>
+</settings>
+<grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch"/>
+<layers>
+<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/>
+<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes"/>
+<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="yes"/>
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+<layer number="20" name="Dimension" color="15" fill="1" visible="yes" active="yes"/>
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+<layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes"/>
+</layers>
+<library>
+<description>&lt;LED Power Supplies 6-36Vin 2-30V 1500mA Pin DC-DC LED Driver&lt;/b&gt;&lt;p&gt;
+&lt;author&gt;Created by SamacSys&lt;/author&gt;</description>
+<packages>
+<package name="LDD1500L">
+<description>&lt;b&gt;LDD-1500L-2&lt;/b&gt;&lt;br&gt;
+</description>
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+<connect gate="G$1" pin="-VOUT_2" pad="12"/>
+<connect gate="G$1" pin="+VOUT_1" pad="13"/>
+<connect gate="G$1" pin="+VOUT_2" pad="14"/>
+<connect gate="G$1" pin="PWM_+ANALOG_DIM" pad="21"/>
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+</connects>
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+</drawing>
+</eagle>
-- 
cgit v1.2.3