From 029d1c83fade148faa70a5837d185442d2b5cf7c Mon Sep 17 00:00:00 2001 From: Blaise Thompson Date: Fri, 7 May 2021 15:06:29 -0500 Subject: first draft driver-pcb --- .../footprints.pretty/CONV_VXO7815-500-M.kicad_mod | 28 ++++++++++++++++++++++ 1 file changed, 28 insertions(+) create mode 100644 potentiosynth/driver-pcb/kicad/footprints.pretty/CONV_VXO7815-500-M.kicad_mod (limited to 'potentiosynth/driver-pcb/kicad/footprints.pretty/CONV_VXO7815-500-M.kicad_mod') diff --git a/potentiosynth/driver-pcb/kicad/footprints.pretty/CONV_VXO7815-500-M.kicad_mod b/potentiosynth/driver-pcb/kicad/footprints.pretty/CONV_VXO7815-500-M.kicad_mod new file mode 100644 index 0000000..9fa5692 --- /dev/null +++ b/potentiosynth/driver-pcb/kicad/footprints.pretty/CONV_VXO7815-500-M.kicad_mod @@ -0,0 +1,28 @@ + +(module CONV_VXO7815-500-M (layer F.Cu) (tedit 5F8F3960) + (descr "") + (fp_text reference REF** (at -3.325 -9.135 0) (layer F.SilkS) + (effects (font (size 1.0 1.0) (thickness 0.015))) + ) + (fp_text value CONV_VXO7815-500-M (at 4.93 9.135 0) (layer F.Fab) + (effects (font (size 1.0 1.0) (thickness 0.015))) + ) + (fp_line (start -6.25 -6.75) (end 6.25 -6.75) (layer F.Fab) (width 0.127)) + (fp_line (start 6.25 -6.75) (end 6.25 6.75) (layer F.Fab) (width 0.127)) + (fp_line (start 6.25 6.75) (end -6.25 6.75) (layer F.Fab) (width 0.127)) + (fp_line (start -6.25 6.75) (end -6.25 -6.75) (layer F.Fab) (width 0.127)) + (fp_line (start -7.0 -7.5) (end 7.0 -7.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 7.0 -7.5) (end 7.0 7.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 7.0 7.5) (end -7.0 7.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -7.0 7.5) (end -7.0 -7.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -3.93 -6.75) (end 3.93 -6.75) (layer F.SilkS) (width 0.127)) + (fp_circle (center -5.5 -8.0) (end -5.4 -8.0) (layer F.SilkS) (width 0.2)) + (fp_circle (center -5.5 -8.0) (end -5.4 -8.0) (layer F.Fab) (width 0.2)) + (fp_line (start 3.93 6.75) (end -3.93 6.75) (layer F.SilkS) (width 0.127)) + (fp_line (start 6.25 -4.43) (end 6.25 4.43) (layer F.SilkS) (width 0.127)) + (fp_line (start -6.25 4.43) (end -6.25 -4.43) (layer F.SilkS) (width 0.127)) + (pad 1 smd rect (at -5.5 -6.0) (size 2.5 2.5) (layers F.Cu F.Mask F.Paste)) + (pad 2 smd rect (at 5.5 -6.0) (size 2.5 2.5) (layers F.Cu F.Mask F.Paste)) + (pad 3 smd rect (at 5.5 6.0) (size 2.5 2.5) (layers F.Cu F.Mask F.Paste)) + (pad 4 smd rect (at -5.5 6.0) (size 2.5 2.5) (layers F.Cu F.Mask F.Paste)) +) -- cgit v1.2.3